Alif Semiconductor /AE512F80F5582AS_CM55_HP_View /DSI /DSI_PHY_STATUS

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Interpret as DSI_PHY_STATUS

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PHY_LOCK)PHY_LOCK 0 (PHY_DIRECTION)PHY_DIRECTION 0 (PHY_STOPSTATECLKLANE)PHY_STOPSTATECLKLANE 0 (PHY_ULPSACTIVENOTCLK)PHY_ULPSACTIVENOTCLK 0 (PHY_STOPSTATE0LANE)PHY_STOPSTATE0LANE 0 (PHY_ULPSACTIVENOT0LANE)PHY_ULPSACTIVENOT0LANE 0 (PHY_RXULPSESC0LANE)PHY_RXULPSESC0LANE 0 (PHY_STOPSTATE1LANE)PHY_STOPSTATE1LANE 0 (PHY_ULPSACTIVENOT1LANE)PHY_ULPSACTIVENOT1LANE

Description

PHY Status Register

Fields

PHY_LOCK

This bit indicates the status of PHYLOCK D-PHY signal.

PHY_DIRECTION

This bit indicates the status of PHYDIRECTION D-PHY signal.

PHY_STOPSTATECLKLANE

This bit indicates the status of PHYSTOPSTATECLKLANE D-PHY signal.

PHY_ULPSACTIVENOTCLK

This bit indicates the status of PHYULPSACTIVENOTCLK D-PHY signal.

PHY_STOPSTATE0LANE

This bit indicates the status of PHYSTOPSTATE0LANE D-PHY signal.

PHY_ULPSACTIVENOT0LANE

This bit indicates the status of ULPSACTIVENOT0LANE D-PHY signal.

PHY_RXULPSESC0LANE

This bit indicates the status of RXULPSESC0LANE D-PHY signal.

PHY_STOPSTATE1LANE

This bit indicates the status of PHYSTOPSTATE1LANE D-PHY signal.

PHY_ULPSACTIVENOT1LANE

This bit indicates the status of ULPSACTIVENOT1LANE D-PHY signal.

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